DSD 2016 - 19th Euromicro Conference on Digital System Design
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Website http://dsd2016.cs.ucy.ac.cy |
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Category Embedded and Cyber-Physical Systems; HW & SW design; Reconfigurable and Adaptable Architectures;
Deadline: April 24, 2016 | Date: August 31, 2016-September 02, 2016
Venue/Country: Limassol, Cyprus, Cyprus
Updated: 2016-04-17 21:05:37 (GMT+9)
Call For Papers - CFP
*** Last Mile — Deadline Approaching ***19th Euromicro Conference on Digital System Design (DSD 2016)Aug. 31st - Sept. 2nd, 2016, St. Raphael Resort, Limassol, Cyprushttp://dsd2016.cs.ucy.ac.cy*** Submission Deadline (firm): April 24, 2016 ***Collocated with the 42nd Euromicro Conference on Software Engineeringand Advanced Applications (SEAA 2016)SCOPEThe Euromicro Conference on Digital System Design (DSD) addresses allaspects of (embedded, pervasive and high-performance) digital and mixedHW/SW system engineering, covering the whole design trajectory fromspecification down to micro-architectures, digital circuits and VLSIimplementations. It is a forum for researchers and engineers from academiaand industry working on advanced investigations, developments andapplications.It focuses on today's and future challenges of advanced system architecturesfor embedded and high-performance HW/SW systems, application analysisand parallelization, design automation for all design levels, as well as, onmodern implementation technologies from full custom in nanometertechnology nodes, through FPGAs, to multi-core infrastructures. It covers amultitude of highly relevant design aspects from system, hardware and embedded-software specification, modeling, analysis, synthesis andvalidation, through system adaptability, security, dependability and fault tolerance, to system energy consumption minimization and multi-objectiveoptimization.Authors are kindly invited to submit their work according (but not limited) to the seven main topics of the conference main track. In addition, eightSpecial Sessions (with their own coordinators and subprogram committees) do also welcome contributions in specific themes of particular interest. All papers are reviewed following guidelines, quality requirements andthresholds that are common to all committees.MAIN TOPICST1: Advanced applications of embedded and cyber-physical systemsChallenging and highly-demanding modern applications in (wireless)communication and networking; networked electronic media, multimediaand ambient intelligence; image and video processing; mobile systems;ubiquitous, wearable and implanted systems; military, space, avionics,measurement, control and automotive applications; wireless sensor networkapplications; surveillance and security; environmental, agriculture, urban,building, transportation, traffic, energy, hazard and disaster monitoringand control.T2: Application analysis and parallelization for embedded and high-performance hardware and software designApplication profiling, characterization and bottleneck detection; applicationrestructuring for parallelism; application parallelization, information-flowanalysis, scheduling and mapping for application-specific processor; MPSoCmemory and communication architecture synthesis; HW/SW co-design andalgorithm/architecture matching; combined hardware/software design spaceexploration and HW/SW system multi-objective optimization; parallelization,scheduling and mapping of applications for (heterogeneous) processor andMPSoC architectures; re-targetable (application-specific) compilation;architectural support for compilers/programming models; performance, energy consumption and other parametric analysis for HW/SW systems;analytical modeling and simulation tools; benchmark applications, workloadand benchmarking for heterogeneous HW/SW systems; virtual andFPGA-based system prototyping.T3: Specification, modeling, analysis, verification and test for systems,hardware and embedded software Modeling, simulation, design and verification languages; functional, structuraland parametric specification and modeling; model-based design andverification; system, hardware, and embedded software analysis, simulation,emulation, prototyping, formal verification, design-for-test and testing at alldesign levels; dependability, safety, security and fault-tolerance issues. T4: Design and synthesis of systems, hardware and embedded software Quality-driven design; model-, platform- and template-based design;design-space exploration; multi-objective optimization; system, processor,memory and communication architecture design; application scheduling andmapping to platforms; (Heterogeneous) multiprocessor systems on-a-chip(MPSoC), hardware multiprocessors and complex accelerators; generic systemplatforms and platform-based design; processor, memory andcommunication architectures; 3D MPSoCs and 3D NoCs; ASIP- andGPU-based platforms; software design and programming models formulticore platforms; IP design, standardization and reuse; parallelismexploitation and scalability techniques; virtual components; system ofsystems; compiler assisted MPSoCs; hardware support for embedded kernels;embedded software features; static, run-time and dynamic optimizations ofembedded MPSoCs; benchmarks and benchmarking for MPSoCs; NoCarchitecture and quality of service; power dissipation and energy issues inSoCs and NoCs.T6: Programmable/reconfigurable/adaptable architecturesDesign methodologies and tools for reconfigurable computing; run-time, partial and dynamic reconfiguration; fine-grained, mixed-grained andcoarse-grained reconfigurable architectures; reconfigurable interconnectionsand NoCs; FPGAs; systems on reconfigurable chip; system FPGAs, structuredASICs; co-processors; processing arrays; programmable fabrics; adaptivecomputing devices, systems and software; adaptable ASIPs and ASIP-basedMPSoCs; hardware accelerators; optimization of FPGA-based cores; sharedresource management; novel models, design algorithms and tools for FPGAsand FPGA-based systems; rapid prototyping systems and platforms;adaptable wireless and mobile systems.T7: New issues introduced by emerging technologiesImportant issues for system, circuit and embedded software designintroduced by e.g. the nanometer CMOS and beyond CMOS technologies, 3Dintegration, optical and other new memory and communication technologies;new human-machine interfaces; neural- and bio-computation; (bio) sensorand sensor network technologies; pervasive and ubiquitous computing(Internet of Things); related design methods and EDA tools; Flexible DigitalRadio-digital architecture design and methodologies concepts formulti-standard, multi-mode flexible radios.SPECIAL SESSIONS/ORGANIZERSDTFT: Dependability, Testing and Fault Tolerance in Digital SystemsH. Kubatova (CTU Prague, CZ), Z. Kotasek (TU Brno, CZ)MCSDIA: Mixed Criticality System Design, Implementation and AnalysisK. Gruttner (OFFIS, DE), E. Villar (TEISA U Cantabria, ES)AHSA: Architectures and Hardware for Security ApplicationsParis Kitsos (TEI of Western Greece, GR)DCPS: Design of Heterogeneous Cyber-Physical SystemsM. Geilen, (TUE, NL), D. Quaglia (U Verona, IT)ASHWPA: Advanced Systems in Healthcare, Wellness and Personal AssistanceF. Leporati (U Pavia, IT)ASAIT: Architectures and Systems for Automotive and IntelligentTransportationS. Niar (U Valenciennes, FR)SDSG: System Design for the Smart GridR. Jacobsen (Aarhus U, DK), E. Ebeid (Aarhus U, DK)EPDSD: European Projects in Digital System DesignF. Leporati (U Pavia, IT), L. Jozwiak (TUE, NL)SUBMISSION GUIDELINESAuthors are encouraged to submit their manuscripts tohttps://easychair.org/conferences/?conf=dsd2016 . Should an unexpected web access problem be encountered, please contactthe Program Chair by email (dsd2016easychair.org).Each manuscript should include the complete paper text, all illustrations,and references. The manuscript should conform to the IEEE format:single-spaced, double column, US letter page size, 10-point size TimesRoman font, up to 8 pages. In order to conduct a blind review, no indicationof the authors' names should appear in the manuscript, references included.CPS, Conference Publishing Services, publishes the (ISI indexed) DSDProceedings, available worldwide through the IEEE Xplore Digital Library.Extended versions of selected best papers will be published in a specialissue of the ISI indexed "Microprocessors and Microsystems: EmbeddedHardware Design" Elsevier journalhttp://www.journals.elsevier.com/microprocessors-and-microsystems/ .IMPORTANT DATES· Submission of papers: April 24, 2016 (firm)· Notification of acceptance/rejection: June 13, 2016· Camera-Ready submission: July 4, 2016DSD STEERING COMMITTEE· Lech Jozwiak (TU Eindhoven, NL) - Chairman· Krzysztof Kuchcinski (U Lund, SE)· Antonio Nunez (IUMA/ULPGC, ES)· Francesco Leporati (U Pavia, IT)· Eugenio Villar (TEISA U Cantabria, ES)· Jose Silva Matos (U Porto, PT)PROGRAM CHAIRS · Paris Kitsos (TEI West. Greece, GR) - Chair· Odysseas Koufopavlou (U Patras, GR) - Honorary ChairGENERAL CHAIR· George A. Papadopoulos (U Cyprus, CY)PROGRAM COMMITTEEhttp://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016
Keywords: Accepted papers list. Acceptance Rate. EI Compendex. Engineering Index. ISTP index. ISI index. Impact Factor.
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