2011 JSTQE Packaging and Integration - JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS on Packaging and Integration technologies for Optical MEMS/NEMS, Optoelectronic and Nanophotonic Devices

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Category: 2011 jstqe packaging and integration;

Website: photonicssociety.org/call-for-papers

Edit/Print: / Print CFP | Venue/Country: Call for Papers / Guatemala

Deadline: Jul 01, 2010 | Date: May 30, 2011 - May 30, 2011

Updated Time: 2010-06-04
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Call For Papers - CFP

JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS on

Packaging and Integration technologies for Optical MEMS/NEMS, Optoelectronic and Nanophotonic Devices

Submission Deadline: July1, 2010

It is increasingly difficult to meet the high-bandwidth density, low-latency, and low-energy communication requirements of current and future terascale computing systems using conventional electrical interconnects. Optical devices and optical interconnects can overcome these limitations. A vast amount of work is being carried out in the development of optical interconnects, optical PCBs and chip-to-chip as well as on-chip optical interconnections. In order to reduce the footprint and cost of the optical interconnects, the size of the optical components needs to be reduced and more functionality must be integrated within one component. Silicon wire, plasmonic waveguides and photonic crystal structures are just examples of approaches to reach these goals. Coupling these tiny structures to the external world, which is dominated by optical fiber, presents a challenge, especially since the solutions need to be cost effective and manufacturable. As optical packages become more compact and dense, new problems arise in reconciling the I/O bandwidth, power delivery and cooling needs. If wafer integration is the pathway to low cost integrated optical modules, wafer-level testing of optical CMOS ICs would be a necessary testing tool. IEEE Journal of Selected Topics in Quantum Electronics invites manuscript submissions in the area of optical MEMS/NEMS, optoelectronic and nanophotonic packaging and integration technologies. Technical areas include but are not limited to:

3D stack integration, 3D optical interconnect methods

Novel materials and bonding methods for optical packaging

Heat and power management in 3D optical stacks

Wafer-level testing on optical CMOS ICs

Wafer-level packaging of optical MEMS/NEMS and optical modules

Novel nanophotonic integration methods

Photonics heterointegration techniques

Optical sources, detectors and waveguide device integration with CMOS

Coupling into and from silicon nanowire and plasmonic waveguide devices for manufacturing

Optical PCB, Chip-to-chip, intra-chip and Free-Space Interconnection;

Optical microbench & Passive Alignment Technology;

Fully portable miniaturized optical modules

Active Alignment Methods and Tools;

Photonics packaging reliability issues and design for reliability

The Guest Editors for this Issue are: Sonia García-Blanco, Institute National d’Optique (INO), Québec, Canada; Karen Matthews, Corning Incorporated, USA; Muhannad Bakir, Georgia Tech, USA; Folkert Horst, IBM Zurich, Switzerland; Keishi Ohashi, NEC Nano Electronics Research Lab, Japan.

The deadline for submission of manuscripts is July 1, 2010; publication is scheduled for May/June, 2011. Ideally, papers that have been accepted will be posted online at IEEE Xplore 6 weeks after acceptance decision, pending no page proof corrections.

Online submission is mandatory at: mc.manuscriptcentral.com/pho-ieee. Please select the Journal of Selected Topics of Quantum Electronics Journal from the drop-down menu. Contributed papers should be up to eight pages in length, and invited up to 12 pages. Beyond that, a charge of $220 per page applies. All submissions will be reviewed in accordance with the normal procedures of the Journal.

For inquiries for this Special Issue, please contact:

JSTQE Editorial Office - Chin Tan Lutz

IEEE/Photonics Society, 445 Hoes Lane, Piscataway, NJ 08854, U.S.A.

Phone: 732-465-5813, Email: c.tanlutz@ieee.org

The following supporting documents are required during manuscript submission:

1) MS Word or PDF formatted manuscript (double columned, 12 pages for an Invited Paper, 8 pages for a Contributed paper.)Bios of ALL authors are mandatory, photos are optional. You may find the Tools for Authors link useful: www.ieee.org/web/publications/authors/transjnl/index.html 2) Completed the IEEE Copyright Form. Copy and paste the link below: www.ieee.org/web/publications/rights/copyrightmain.html 3) Completed Color Agreement/decline form. Please email c.tanlutz@ieee.org to request this form. 4) MS Word list of ALL Authors FULL Contact information as stated below: Last name (Family name): /First name: Suffix (Dr./Prof./Ms./Mr.):/Affiliation:/ Dept.: / Address:/ Telephone:/ Fax:/ Email:/ Alternative Email:

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