APPED 2010 - 2010 Asia-Pacific Conference on Power Electronics and Design (APPED 2010)
Website www.iita-conference.org/aped2010 |
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Category APPED 2010
Deadline: February 15, 2010 | Date: May 30, 2010
Venue/Country: Wuhan, China
Updated: 2010-06-04 19:32:22 (GMT+9)
Call For Papers - CFP
1.1. Technologies and Digital CircuitsEmerging logic & memory technologies and applications,
Device design, Low power low leakage circuits,
Memory circuits, Cooling technologies, Battery
technologies, Variation-tolerant design, Temperatureaware and reliable design
1.2. Design Tools
Energy simulation and estimation tools that operate at
the circuit/gate level, RT level, behavioral level, and
algorithmic level, Variation-aware design, Physical design and interconnects
1.3. Logic and Microarchitecture Design
Processor core design, Cache design, Logic and RTL
design, Arithmetic and signal processing circuits,
Encryption technologies, Asynchronous design
1.4. System Design and Methodologies
Microprocessor, DSP and embedded systems design,
FPGA and ASIC designs , Emerging applications,
Server thermal management, System level power
management, Behavioral and system level design aids
1.5. Analog, MEMS and Mixed Signal Electronics
RF circuits, Wireless, MEMS circuits, AD/DA
Converters, Mixed-signal circuits, DC-DC conversion
1.6. Software Design and Optimization
Power aware compiler and operating system design,
Application level optimizations, Wireless and sensor networks
Keywords: Accepted papers list. Acceptance Rate. EI Compendex. Engineering Index. ISTP index. ISI index. Impact Factor.
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