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    CAD 2012 - IEEE Transactions on CAD Special Section on Three-dimensional Integrated Circuits and Microarchitectures

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    Category CAD 2012

    Deadline: March 15, 2012 | Date: August 01, 2012

    Venue/Country: Online, Online

    Updated: 2011-12-19 13:04:42 (GMT+9)

    Call For Papers - CFP

    IEEE Transactions on CAD

    Special Section on Three-dimensional Integrated Circuits and Microarchitectures

    In recent years, the area of three-dimensional (3D) Integrated Circuits has

    become a very attractive research topic due to its potential for extending

    Mooreƕs momentum in the next decade. The key benefits of 3D ICs over

    traditional two-dimensional chips include the potential of reduced overheads

    for global interconnects, higher packing densities and smaller footprints,

    heterogeneous integration, and faster times-to-market. To efficiently exploit

    the benefits of 3D technologies, design techniques and methodologies for

    supporting 3D designs are imperative; design space exploration at the

    architectural level is also essential to fully take advantage of the 3D

    integration technologies to build a high- performance, energy-efficient

    integrated systems, GPUs, system-on-chips, heterogeneous systems, and other

    integrated systems.

    We are pleased to announce a call for papers for a special section of TCAD on

    Three-dimensional (3D) Integrated Circuits. We welcome submissions to this

    special section based on new, unpublished contributions. Submissions may also

    be based on work previously published in refereed conferences/workshops; if so,

    the submission must contain at least 30% new materials, and the authors must

    provide a cover letter clearly stating how the submission differs from and/or

    expands on the previously-published work.

    Areas of interest for this special section include (but are not limited to) the

    following topics:

    * Physical design methodologies/tools/algorithms for 3D

    * High-level synthesis/logic synthesis for 3D ICs

    * ESL design methodologies and tools for 3D ICs

    * Thermal analysis and thermal-aware designs

    * 3D architectures and design space exploration

    * 3D Test, design-for-test, and debug techniques

    * Signal and power integrity, and ESD in 3D

    * Chip-package co-design for 3D

    * Economic benefit/cost trade-off studies

    * Application, product, or test-chip case studies

    Please submit your paper at the TCAD website,

    http://mc.manuscriptcentral.com/tcad. Please specify "Special Section on 3D ICs

    and Microarchitectures" on your cover page and in the notes section of the

    Web site submission form.

    IMPORTANT DATES

    Submission Deadline: 15 March 2012

    Acceptance Notice: 1 July 2012

    Final Manuscript Due: 1 August 2012


    Keywords: Accepted papers list. Acceptance Rate. EI Compendex. Engineering Index. ISTP index. ISI index. Impact Factor.
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