LTB-3D 2010 - 2010 2nd IEEE International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D)

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Category LTB-3D 2010

Deadline: October 30, 2009 | Date: January 19, 2010

Venue/Country: Tokyo, Japan

Updated: 2010-06-04 19:32:22 (GMT+9)

Call For Papers - CFP

on Low Temperature Bonding for 3D Integration

The University of Tokyo, Hongo, Japan

January 19-20, 2010

Recently, 3D integration attracts increasing interest as one of the advanced SiP structures. It provides high-density packaging structures. In addition, by optimizing system design, it realizes SiP with performances exceeding SoC, or enables low-cost manufacturing process for SiP with performance equivalent to SoC. In addition, 3D integration of photonic devices, ie compound semiconductors, with silicon LSI have potential to realize very high speed data processing by combining optical data transportation and electronic data processing. On the other hand, in MEMS devices, SiP by integration of LSI and MEMS becomes an inevitable trend and 0-level packaging by wafer bonding is now in progress as a special technology in MEMS.

This workshop aims at 3D-LSI /photonic/MEMS packaging based on rapidly emerging low-temperature bonding technology as well as other high density inter-connect technologies. This workshop solicits papers that document new developments and cover the full range of basic science, process technologies, and device applications of low-temperature bonding technology. Presentations on bonding of novel materials to synthesize heterostructures, products applications of 3D integration of LSI/photonic/ MEMS devices are also encouraged.

Professor Dr. Tadatomo Suga

The Univeristy of Tokyo

Research committee of 3D Integration by Low-temperature Bonding Technology

Important date:

Submission of abstracts: October 30th, 2009

Final Papers / Presentation Materials: November 15th, 2009

Conferenece: January 19th-20th , 2010