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    ICESD 2013 - 12th International Conference on Embedded Systems Design

    View: 619

    Website www.vlsidesignconference.org | Want to Edit it Edit Freely

    Category ICESD 2013

    Deadline: July 02, 2012 | Date: January 05, 2013-January 10, 2013

    Venue/Country: Pune, India

    Updated: 2012-04-28 00:43:44 (GMT+9)

    Call For Papers - CFP

    Papers are invited on previously unpublished results in the following categories:

    Theme - Green Technology :

    Energy-efficient design, ultra-low-power, crosslayer power management, smart grids, data centers, green technologies.

    Embedded Systems :

    Embedded system hardware/software co-design; Reconfigurable hardware design; Embedded software; Real-time operating systems; Middleware and virtualization; Embedded multicores and manycores; Communications; Encryption, security, compression; Hybrid systems-on-chip; Sensor networks; Programmable devices; Hardware-software coverification; Embedded system reliability; Embedded applications (automotive, mobile,medical, etc.), platforms, and case studies.

    Digital Design :

    Low-power design; Asynchronous design; Package and board design.

    Analog/RF Design :

    System-leve l Design/ESL :

    System-level design methodology; Gigascale design methodology; Multicore systems; Processor and memory design; Concurrent interconnect; Networks-on-chip; Defect tolerant architectures.

    Logic Synthesis and Physical Design :

    Logic synthesis; Technology mapping; Asynchronous synthesis; Physical design; Floorplanning; Placement; Routing; Clock Design; Layout issues in design for manufacturability.

    Test and Reliability :

    Fault model ing/simulation; ATPG; DFT; Delay test; Fault-tolerance; Onl ine test; AMS/RF test; Boardlevel and system-level test; Silicon debug, postsilicon validation; Memory test; Reliability test.

    Functional Verification :

    Behavioral Simulation; RTL Simulation; Coverage Driven Verification; Assertion Based Verification; Gate-level simulation; Emulation; Hardware Assisted Verification; Formal Verification; Equivalence Checking; Verification Methodologies.

    Device/circuit simulation and modeling :

    Design Verification; Signal integri ty; Technology model ing-design-simulation; Analog/mi xed-signal simulation; Multi-domain simulation; Numerical Emerging Technologies :

    Issues in nano-CMOS technologies; MEMS; CMOS sensors; CAD/EDA methodologies for nanotechnology; Non-classical CMOS; Post-CMOS devices; Biomedical circuits and systems.


    Keywords: Accepted papers list. Acceptance Rate. EI Compendex. Engineering Index. ISTP index. ISI index. Impact Factor.
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