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    AAGPC 2012 - Workshop on Acclerator Architectures for General-Purpose Computing: from a Hardware, System Software and Application's Perspective

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    Website www.hpcaconf.org | Want to Edit it Edit Freely

    Category AAGPC 2012

    Deadline: December 16, 2011 | Date: February 26, 2012

    Venue/Country: Louisiana, U.S.A

    Updated: 2011-12-10 19:50:35 (GMT+9)

    Call For Papers - CFP

    Effective compilers allow more efficient execution of applications on a given computer architecture. Conversely, well-conceived architectural features can support more effective compiler optimization techniques. Good interaction between compilers and computer architectures is key to successful design of highly efficient and effective computer systems. This workshop is to promote new ideas and present recent developments in compiler techniques and computer architectures whose synergy enhances both capabilities and efficiency. Papers are solicited on any aspect of interaction between compilers and architectures in the design of microprocessors, multicores, parallel processing systems, and embedded systems.

    Potential topics include but are not limited to:

    Processor reliability enhancement

    Secure, dependable computing

    Heterogeneous computing

    Dynamic compilation and optimization

    Memory, cache, and register management

    Code optimization and generation

    Debugging, verification, and validation

    Multicore software and compilation

    GPGPUs and compilation

    Multicore embedded systems

    System virtualization

    Parallelism enhancement and exploitation

    Low-power architecture and software

    Task synchronization and scheduling

    Efficient I/O support

    The program will feature a keynote speaker and technical paper sessions comprising approximately ten papers.

    Keywords: Accepted papers list. Acceptance Rate. EI Compendex. Engineering Index. ISTP index. ISI index. Impact Factor.
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