CICC 2010 - 2010 Custom Integrated Circuits Conference

Website www.ieee-cicc.org | Edit Freely

Category CICC 2010

Deadline: April 19, 2010 | Date: September 19, 2010-September 22, 2010

Venue/Country: California, U.S.A

Updated: 2010-08-17 17:18:18 (GMT+9)

Call For Papers - CFP

Amplifiers, voltage references and regulators, opamps, sample-and-hold circuits, continuous and discrete-time filters, oversampled and Nyquist-rate data converters, non-linear analog circuits, mixed analog/digital IC applications, analog circuits for sensor interfaces, low-voltage/low-power analog, and deep submicron issues in analog design.

SOC/ASIC/SIP/3D:

Designs and methodologies for SoC//ASIC/SiP and 3D, in particular, low power architectures and design techniques, the state of the art in Embedded Processor designs, 3D/multi-chip design and verification and exciting digital chip designs.

Memory:

Memory circuits and architectures addressing power-performance trade-offs, Vmin reduction, resilient design (for example, redundancy, ECC), variations tolerant design, cell stability and low-leakage design. Also of interest are soft error robustness, reliability, memory interface and applications specific memory.

Biomedical, Actuators, MEMS, and Sensors:

Advanced ICs for biomedical, aerospace, energy, environment, and security applications. Interface circuits for emerging technologies in MEMS, sensors, and actuators are of particular interest. Advanced ICs for biomedical, aerospace, automotive, energy, environment, and security applications. Interface circuits for emerging technologies in medicine, MEMS, sensors, and actuators are of particular interest. Examples include biosensors and devices, nanotechnology, microchemical sensors, image sensors, OLED’s, DNA microarrays, micro- and nanofluidic chips, novel display technologies and plastic circuitry.

IC Manufacturing:

Special focus on challenges of and alternatives to CMOS scaling, Design for Manufacturability, specialty manufacturing techniques, design impact of process-technology selection or packaging. Advanced manufacturing techniques using any combination of bulk/SOI CMOS, bipolar, non-silicon, and optoelectronics technologies. Evolving chip packaging such as chip stacking, lead-free, flip-chip, and System-in-Package. Tutorial papers are encouraged.

Power Management:

Circuit and system architectures for power management and power consumption optimization. Advanced circuit topologies and innovations in switching / linear regulators, leakage management, energy scavenging, wireless power transmission, battery charging and metering, digital control, dynamic power control, and other topical areas related to the challenges of efficient power generation, distribution, and utilization.

Simulation and Modeling:

Compact models for active and passive devices, behavioral modeling, signal-integrity modeling and simulation. System and circuit simulation. Parasitic extraction and reduction. Simulation techniques for analog, RF, and mixed-signal circuits. Package modeling. Process variation, statistical, and reliability modeling. Compact models for extreme environment operation. SOI and multiple gate device modeling,novel design tools.

Test, Debug, and Reliability:

Debug techniques. DFT (design for test) for analog/mixed signal circuits, equalizers, CDR, and high speed IO. Design techniques for high reliability applications. Reliability concerns in leading edge technologies, such as soft errors. Innovations in ESD protection. Issues of testability and constraints due to protection of intellectual property or system security.

Wired Communications:

Circuits and systems for electrical and optical networks, including: peripheral I/O buses, Ethernet, SONET, SATA, HDMI, PCIe, USB, serial links, backplane, high-speed memory and graphics interfaces, intra-chip and chip-to-chip interconnects, clocking and high-speed low-power blocks for broadband applications; circuit blocks including serializers, deserializers, digital and mixed-signal equalizers, PLLs, DLLs, CDRs, oscillators and integrated photonic transceivers; circuit and system-level solutions for variabiltiy for wireline applications.

Wireless Designs:

Integrated wireless transceiver architectures and sub-circuits for cellular, connectivity, broadband and low-power communication, millimeter-waves, and beyond, biomedical, smart antennas MIMO, RF MEMS, software-defined and cognitive radio. Papers on RF circuit solutions targeting emerging wireless applications and techniques are particularly encouraged.