VTS 2011 - 2011 IEEE VLSI Test Symposium (VTS)

Website www.tttc-vts.org | Edit Freely

Category VTS 2011

Deadline: September 19, 2010 | Date: May 01, 2011-May 05, 2011

Venue/Country: Dana Point, U.S.A

Updated: 2010-08-22 03:09:45 (GMT+9)

Call For Papers - CFP

The VTS Program Committee invites original, unpublished paper submissions for VTS 2011. Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status.

PROGRAM CHAIR

Claude Thibeault

École de Technologie supérieure

claude.thibeaultetsmtl.ca

GENERAL CHAIR

Cecilia Metra

University of Bologna

cecilia.metraunibo.it

VTS Topics

Major topics include, but are not limited to:

Analog, Mixed-Signal & RF Test

ATPG & Compression

ATE Architecture & Software

Board & System Test

Built-In Self-Test (BIST)

Current Based Test

Defect/Fault Tolerance & Self-Repair

Delay & Performance Test

Design for Testability (DFT)

Design Verification/Validation

Diagnosis and Debug

Embedded System and Microsystems Test

Embedded Test Methods

Emerging Technologies Test

FPGA Test

Fault Modeling and Simulation

Infrastructure IP

Low-Power IC Test

MEMS And Sensor Test

Memory Test and Repair

On-Line Test

Power Issues in Test

System-on-Chip (SOC) Test

System-in-Package Test

Standards

Test Economics

Thermal Test

Test of Biomedical Devices

Test of High-Speed I/O

Test Quality and Reliability

Test Resource Partitioning

Transients & Soft Errors