HPPAC 2011 - The Seventh Workshop on High-Performance, Power-Aware Computing

Website www.ipdps.org/ipdps2011 | Edit Freely

Category HPPAC 2011

Deadline: January 17, 2011 | Date: May 16, 2011

Venue/Country: Anchorage, U.S.A

Updated: 2010-10-07 11:27:23 (GMT+9)

Call For Papers - CFP

CALL FOR PAPERS

Seventh IEEE Workshop on

High-Performance, Power-Aware Computing (HP-PAC)

May 16, 2011

to be held in conjunction with IPDPS

May 16 - 20, 2011

Anchorage, Alaska, USA

SCOPE

High-performance computing is and has always been performance-oriented.

However, a consequence of the push towards maximum performance is

increased energy consumption, especially in datacenters and

supercomputing centers. Moreover, as peak performance is rarely

attained, some of this energy consumption results in little or no

performance gain. In addition, large energy consumption costs

datacenters and supercomputing centers a significant amount of

money and wastes natural resources.

The main goal of this workshop is to provide a timely forum for the

exchange and dissemination of new ideas, techniques, and research in

high-performance, power-aware computing (HPPAC). HPPAC will present

research that reduces (1) power consumption, (2) energy consumption,

or (3) heat generation with little or no performance penalty in

high-performance computing systems. In effect, the workshop aims to

move towards "greener" solutions for datacenters and supercomputing

centers.

Topics of interest include but are not limited to the following.

. Novel power-aware architectures for HPC

. Power-aware middleware for HPC

. Power-aware runtime systems for HPC

. Reduced power/energy/heat algorithms & applications

. Surveys or studies of power/energy/heat usage of HPC applications

PROCEEDINGS

The proceedings of this workshop will be published together with

the proceedings of other IPDPS '10 workshops by the IEEE Computer

Society Press.

PAPER SUBMISSIONS

Paper must be submitted electronically via EDAS

http://www.edas.info/newPaper.php?c=8149.

Authors must submit papers formatted in IEEE Computer Society

two-column format (in PDF format) not exceeding 8 single-spaced

pages, including abstract, contact address, figures, and references.

Note: the PDF file must be viewable using ``acroread'' or similar

common utility. Also, your paper should use a page size of 8.5x11

inches (LETTER sized output not A4).

IMPORTANT DATES

Paper submission: 20 December 2010 at 11:59PM EST

Author notification: 17 January 2011

Camera-ready due: 1 February 2011

WORKSHOP CO-CHAIRS

Rong Ge, Marquette University, USA

Roberto Gioiosa, Barcelona Supercomputing Center, Spain

PROGRAM COMMITTEE

Frank Bellosa, Karlsruhe Institute of Technology (KIT), Germany

Taisuke Boku, University of Tsukuba, Japan

Yuan Chen, HP Labs, USA

Chen-Yong Cher, IBM, USA

Marco Cesati, University of Rome "Tor Vergata", Italy

Bronis de Supinski, LLNL, USA

Xizhou Feng, Marquette University, USA

Wu-chun Feng, Virginia Tech, USA

Chung-Hsing Hsu, Oak Ridge National Laboratory, USA

Canturk Isci, IBM, USA

Rob Knauerhase, Intel Labs, USA

Laurent Lefevre, INRIA, France

David Lowenthal, University of Arizona, USA

Hiroshi Nakashima, Kyoto University, Japan

Ripal Nathuji, Microsoft, USA

Karsten Schwan, Georgia Tech, USA

Jordi Torres, BSC, Spain

CONTACT INFO

web: http://hppac11.ac.upc.edu

email: roberto.gioiosa -at- bsc.es