MULTIPROG 2011 - Fourth Workshop on Programmability Issues for Heterogeneous Multicores (MULTIPROG-2011)

Website http://www.hipeac.net/hipeac2011_commence/ | Edit Freely

Category MULTIPROG 2011

Deadline: November 09, 2010 | Date: January 23, 2011

Venue/Country: Crete, Greece

Updated: 2010-10-11 13:59:07 (GMT+9)

Call For Papers - CFP

Programmability Issues for Heterogeneous Multicores

(MULTIPROG-2011)

To be held in conjunction with:

the 6th International Conference on

High-Performance and Embedded Architectures and Compilers (HiPEAC)

Heraklion, Crete, Greece, January 23, 2011

Computer manufacturers have already embarked on the multi-core roadmap, promising to add more and more cores/hardware threads on a chip: many-cores are on the horizon. This shift to an increasing number of cores and heterogeneous architectures has placed new burdens on the programming community. Until now, software has been developed with a single processor in mind and it needs to be parallelized and optimized for accelerators such as GPUs to take advantage of the new breed of multi-/many-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand.

The fourth edition of the MULTIPROG workshop aims to bring together, and cause fruitful interaction between, researchers interested in programming models and their implementation and in computer architecture, with special emphasis on heterogeneous architectures. A wide spectrum of issues are central themes for this workshop such as what the future programming models should look like to accelerate software productivity, how compilers, run-times and architectures should support these new programming models, innovative algorithm and data structure development, and heterogeneous embedded, accelerated systems.

MULTIPROG is intended for quick publication of early results, work-in-progress, etc, and is not intended to prevent later publication of extended papers. We will prioritize papers addressing cross-cutting issues and that provide thought-provoking insights into the main themes. Proceedings with accepted papers will be made available at the workshop.

This year, for the first time, two AMD Best Paper Awards will be presented to the two most outstanding papers presented at MULTIPROG-2011. Each winner will receive a high-end ATi graphics card sponsored by AMD.

Topics of interest

Papers are sought on topics including, but not limited to:

Multi-core architectures

Architectural support for compilers/programming models

Processor (core) architecture and accelerators, in particular GPUs

Memory system architecture

Performance, power, temperature, and reliability issues

Heterogeneous computing

Algorithms and data structures for heterogeneous systems

Applications for heterogeneous computing and real-time graphics

Programming models for multi-core architectures

Language extensions

Run-time systems

Compiler optimizations and techniques

Benchmarking of multi-/many-core architectures

Tools for discovering and understanding parallelism

Tools for understanding performance and debugging

Case studies and performance evaluation

Important dates

Abstract Submission: October 12, 2010 (extended!)

Submission deadline: October 12, 2010 (extended!)

Notification to authors: November 28, 2010

Final version of accepted papers: TBA

Paper submission

Submitted papers should use the LNCS format and use a maximum of 14 pages. Manuscript preparation guidelines can be found at the LNCS web site (ftp.springer.de/pub/tex/latex/llncs/, for both Latex and Word). Please check that (i) pages are numbered, and (ii) graphs etc. remain legible when printed in black and white.

In order to submit your paper please go to http://multiprog.ac.upc.edu/hotcrp11.

Organizers

Eduard Ayguade UPC/Barcelona Supercomputing Center Spain eduard[at]ac.upc.edu

Benedict R. Gaster Advanced Micro Devices (AMD) USA benedict.gaster[at]amd.com

Roberto Gioiosa Barcelona Supercomputing Center Spain roberto.gioiosa[at]bsc.es

Lee Howes Advanced Micro Devices (AMD) USA lee.howes[at]amd.com

Per Stenstrom Chalmers University of Technology Sweden pers[at]chalmers.se

Osman Unsal BSC-Microsoft Research Centre Spain osman.unsal[at]bsc.es

Program committee

Ben Bergen LANL USA

Manuel Chakravarty U. of New South Wales Australia

Mats Brorsson KTH Sweden

Marcelo Cintra U. of Edinburgh UK

Pascal Felber U. of Neuchatel Switzerland

Guang Gao U. of Delawere USA

Roberto Giorgi U. of Siena Italy

Hakan Grahn Blekinge Institute of Technology Sweden

Tim Harris Microsoft Research Cambridge UK

Wen-mei Hwu U. of Illinois, Urbana-Champaign USA

Mike Houston AMD USA

Paul Kelly Imperial College of London UK

Mikel Lujan U. of Manchester UK

Tim Mattson Intel Research USA

Simon McKintosh-Smith U. of Bristol UK

Avi Mendelson Microsoft Israel

Nacho Navarro UPC/BSC Spain

Dimitris Nikolopoulos FORTH-ICS Greece

Andy Pimentel U. of Amsterdam The Netherlands

Oscar Plata U. of Malaga Spain

Yanos Sazeides U. of Cyprus Cyprus

Andre Seznec INRIA/IRISA France

Nir Shavit Tel Aviv U. Israel

John E. Stone U. of Illinois USA