GLSVLSI 2023 - 33rd Great Lakes Symposium on VLSI (GLSVLSI 2023, Knoxville, TN, USA)

Website http://www.glsvlsi.org/ | Edit Freely

Category VLSI Circuits and Design; IoT and Smart Systems; Computer-Aided Design (CAD); Testing, Reliability, Fault-Tolerance; Emerging Computing & Post-CMOS Technologies; Hardware Security; VLSI for Machine Learning and Artificial Intelligence; Microelectronic Systems Education

Deadline: March 17, 2023 | Date: June 05, 2023-June 07, 2023

Venue/Country: Knoxville, TN, U.S.A

Updated: 2023-02-28 17:39:13 (GMT+9)

Call For Papers - CFP

http://www.glsvlsi.org/GLSVLSI2023-CFP-LBR-V1.pdf

GLSVLSI 2023

June 5-7, 2023, Knoxville, TN, USA

http://www.glsvlsi.org/

Sponsored by ACM SIGDA

** Selected papers from GLSVLSI 2023 program will be invited to special section of IEEE Transactions on Emerging Topics in Computing **

The 33rd edition of GLSVLSI will be held as an in-person conference. Original, unpublished papers describing research in the general areas of VLSI and hardware design are solicited. Please visit http://www.glsvlsi.org/ for more information.

In addition to the traditional topic areas of GLSVLSI listed below, papers are also solicited for a new track on “IoT and Smart Systems”.

PROGRAM TRACKS:

- VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal systems, NoC, SoC, IoT, interconnects, memories, bio-inspired and neuromorphic circuits and systems, BioMEMs, lab-on-a-chip, biosensors, CAD tools for biology and biomedical systems, implantable and wearable devices, machine-learning for design and optimization of VLSI circuits and design.

- IoT and Smart Systems: Circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid etc.; cyber-physical systems, edge computing, machine learning for IoT, TinyML, cloud computing for IoT devices.

- Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), static timing analysis, signal and power integrity, machine learning for CAD and EDA design.

- Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-aware design, learning-assisted testing.

- Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing, approximate and stochastic computing, sensor and sensor networks, post CMOS VLSI.

- Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, hardware Trojans, side-channel analysis, CPS/IoT security, machine learning for HW security.

- VLSI for Machine Learning and Artificial Intelligence: hardware accelerators for machine learning, novel architectures for deep learning, brain-inspired computing, big data computing, reinforcement learning.

- Microelectronic Systems Education: Pedagogical innovations using a wide range of technologies such as ASIC, FPGA, multicore, GPU, TPU, educational techniques including novel curricula and laboratories, assessment methods, distance learning, textbooks, and design projects, Industry and academic collaborative programs and teaching.

IMPORTANT DATES:

Late breaking news: March 17, 2023 (11:59pm EST)

Acceptance Notification: March 21, 2023

Camera-Ready: April 5, 2023

PAPER SUBMISSION:

Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format to the http://www.glsvlsi.org website is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process.

PAPER FORMAT:

Submissions should be in camera-ready two-column format, following the ACM proceedings specifications located at: https://www.overleaf.com/latex/templates/association-for-computing-machinery-acm-sig-proceedings-template/bmvfhcdnxfty

and the classification system detailed at: http://www.acm.org/publications/class-2012

PAPER PUBLICATION AND PRESENTER REGISTRATION:

Papers will be accepted for regular or poster presentations at the symposium. Every accepted paper MUST have at least one author registered to the symposium by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the symposium and present the paper.

GENERAL CHAIRS:

- Himanshu Thapliyal, University of Tennessee, Knoxville, USA

- Ronald F. DeMara, University of Central Florida, USA

PROGRAM CHAIRS:

- Inna Partin-Vaisband, University of Illinois Chicago, USA

- Srinivas Katkoori, University of South Florida, USA

FINANCE CHAIR:

- Boris Vaisband, McGill University, Canada

SPECIAL SESSION CHAIRS:

- Ujjwal Guin, Auburn University, USA

- Ramtin Zand, University of South Carolina, USA

REGISTRATION CHAIR:

- Naghmeh Karimi, University of Maryland, BC, USA

PUBLICATIONS CHAIR:

- Touraj Nikoubin, University of Texas Dallas, USA

PUBLICITY CHAIRS:

- Norbert Herencsar, Brno Univ. of Tech., Czech Republic

- Srihari Rao Patri, NIT Warangal, India

PRESENTATIONS/VIDEO CHAIRS:

- Soheil Salehi, University of Arizona, USA

- Amit Degada, Marvell Technology, USA

STEERING COMMITTEE:

- Hai Zhou

- Victor Zhirnov

- Weisheng Zhao

- Zhiyuan Yan

- Ken Stevens

- Ioannis Savidis

- Avesta Sasan

- Gang Qu

- Tinoosh Mohsenin

- Martin Margala

- Enrico Macii

- Fabrizio Lombardi

- Alex Jones

- Houman Homayoun

- Jie Han

- Deming Chen

- Yiran Chen

- Erik Brunvand

- Sanjukta Bhanja

- Baris Taskin

- Hai (Helen)Li