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    EPEPS 2011 - 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

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    Website www.epeps.org | Want to Edit it Edit Freely

    Category EPEPS 2011

    Deadline: July 15, 2011 | Date: October 24, 2011-October 26, 2011

    Venue/Country: San Jose, U.S.A

    Updated: 2010-12-09 13:18:13 (GMT+9)

    Call For Papers - CFP

    EPEPS is the premier international conference on advanced and emerging issues in electrical modeling, analysis, synthesis and design of electronic interconnections, packages and systems. It also focuses on new methodologies and CAD/design techniques for evaluating and ensuring signal, power and thermal integrity in high-speed designs. EPEPS is jointly sponsored by the IEEE Components, Packaging and Manufacturing Technology Society and IEEE Microwave Theory and Techniques Society. Authors are invited to submit papers describing new technical contributions related to the broad area of electrical performance of high-speed designs, covering:

    Emerging and advanced issues,

    New design techniques and innovative architectures for design and management,

    Novel CAD concepts, methodologies and algorithms for modeling, simulation and optimization,

    with emphasis on:

    System-level, board-level and on-chip interconnects

    High-speed channels, links, backplanes, serial and parallel interconnects, SerDes

    Multiconductor transmission lines

    Memory and DDR interfaces

    Jitter and noise management

    Signal and thermal integrity

    Power integrity and power distribution networks (PDNs)

    Electronic packages and microsystems

    3D interconnects, 3D packages, TSVs and MCMs

    Nano interconnects and nano structures

    RF/microwave packaging structures, RFICs, mixed signal modules and wireless switches

    Package-chip co-design

    Electromagnetic (EM) and EM interference modeling, simulation algorithms, tools and flows

    Macromodeling including model order reduction as it applies to electrical analysis

    Advanced and parallel CAD techniques for signal, power and thermal integrity analysis

    Measurement and data analysis techniques for system-level and on-chip structures.

    Keywords: Accepted papers list. Acceptance Rate. EI Compendex. Engineering Index. ISTP index. ISI index. Impact Factor.
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