EDPS 2011 - 2011 Electronic Design Processes Symposium (EDPS)

Website www.eda.org/edps | Edit Freely

Category EDPS 2011

Deadline: February 28, 2011 | Date: April 07, 2011-April 08, 2011

Venue/Country: Monterey, U.S.A

Updated: 2010-12-18 15:05:51 (GMT+9)

Call For Papers - CFP

Electronic Design Process Symposium (EDPS)

to be held in April, 2011 at the

Monterey Beach Hotel, in Monterey California

Sponsored by the

Institute of Electrical and Electronic Engineers (IEEE) Computer Society

under the Design Automation Technical Committee (DATC)

and the

Council on Electronic Design Automation (CEDA)

The Electronic Design Processes (EDP) 2011 Symposium, in its 18th year, fosters the free exchange of ideas among the top thinkers, movers, and shakers who focus on how chips and systems are designed in the electronics industry. It provides a forum for this cross-section of the Design community to discuss state-of-the-art improvements to electronics design processes and CAD methodologies, rather than on the functions of the individual tools themselves.

The Workshop, which takes place each year in Monterey, California, emphasized both the here and now and the future. Attendees of this elite workshop have met each year since 1993. It has attracted some of the most far-seeing people in electronics as speakers. If you need to know where the industry is and where it's going with respect to the design and development, and especially methodologies and technology of design, you should consider attending this coming year.

Please visit http://www.eda.org/edps to see the list of past EDP Workshop speakers and presentations: 2010, 2009, 2008, 2007, 2006, 2005, 2004, 2003, 2002, 2001, 2000.

Use the following search tool to help lookup things in the past workshops by pasting in http://www.eda.org/edps

The Symposium solicits papers and proposals for special/panel sessions that would shed light on the methodologies used for real current and future chip and system designs.

THEMES IN 2011:

The 5 main themes of the EDP2011 Workshop include but not be limited to:

Parallel EDA

High-Level Design (including Requirements-Driven Design Flows)

Cloud computing (including Software as a Service)

Low-Power Design (including Solution Mapping to ITRS Roadmap)

3D ICs

If you have suggestions for other themes or proposals for special/panel sessions, please contact the Symposium Program Chairman at edpseda.org

The following is news that was posted on the internet for the past EDPS 2010 Symposium:

- Grant Martin Blog: http://www.chipdesignmag.com/martins/2010/01/24/electronic-design-process-symposium-2010-edition/

- Steve Liebson's blog: "http://www.edn.com/blog/980000298/post/320052232.html"

- Gabe Moretti: http://www.gabeoneda.com/news/go-meet-leading-edge-edps

- Karen Bartelson's blog: Four days of upcoming events: Part 4 EDP:

http://synopsysoc.org/thestandardsgame/?p=566

- Richard Goering's posting to the Cadence Industry Insights blog:

http://www.cadence.com/Community/blogs/ii/archive/2010/04/12/eda-workshop-debate-erupts-over-parallel-programming.aspx?postID=61196

http://www.cadence.com/Community/blogs/ii/archive/2010/04/19/eda-workshop-a-reality-check-on-3d-ics.aspx?postID=61401

http://www.cadence.com/Community/blogs/ii/archive/2010/04/21/presentation-rethinking-software-as-a-service-for-eda.aspx?postID=61522

http://www.cadence.com/Community/blogs/ii/archive/2010/04/22/mechanical-relays-on-ics-babbage-difference-engine-reborn.aspx?postID=61577

- Rahul Deokar of Cadence separately posted his own blog:

http://www.cadence.com/Community/blogs/di/archive/2010/04/16/edp-symposium-uncovers-an-inconvenient-truth-with-a-shot-of-3d.aspx?postID=61368

- Harry Greis posted to a blog:

http://theasicguy.com/2010/04/15/monterey-pop-and-mookie/ - Gary Smith included our Symposium in his newsletter:

http://garysmitheda.com/read.php?story=iNotes_78

or read the entire paper at

http://garysmitheda.com/paper/EDP2010_note.pdf.

A printable version of the coming EDPS 2011 Workshop Call For Papers (CFP) is here:

http://www.eda.org/edps/EDP2011/2011CDP.html

General Chair: Naresh Sehgal

Technical Program Chair: John Swan

Program Committee:

John Swan

Naresh Sehgal (Intel)

Steve Leibson (Tensilica)

Takahide Inoue (STARC)

Andrew B. Kahng (UCSD)

Arturo Salz (Synopsys)

Gabe Moretti (Gabe on EDA)

Aparna Dey, EDA Consultant

Kumar Venkatramani (SoftJin)

Sandeep Shukla (Virginia Tech) Gary Smith (GarySmithEDA)

Bill Halpin (Synplicity)

Bhanu Kapoor (Mimasic)

Patrick Madden (SUNY Binghamton)

Igor Markov (U. of Michigan)

Elaheh Bozorgzadeh (UCI) Juan-Antonio Carballo (IBM)

Laleh Behjat (U. of Calgary)

Steve Grout (Consultant)

Dwight Hill (Synopsys)

Patrick Groeneveld (Magma)

Grant Martin (Tensilica)

Carl Sechen (UT Dallas)

Matthew Guthaus (UCSC)

Richard Goering (Cadence)

Michael Bohm (AccelChip) Raul Camposano (Physware)